A Master of Science thesis in Electrical Engineering by Rana Mahmoud entitled, "Dynamic Power Characteristics of Selective Buried Oxide (SELBOX) MOSFET," submitted in February 2017. Thesis advisors are Dr. Hasan Al-Nashash and Dr. Narayanan Madathumpadical. Soft and hard copy available.
The ever-increasing number of devices and electronic systems resulted in increasing the die size to satisfy the increasing demand. Moreover, the shrinking size of transistors according to the scaling theory became a contributor to increasing the leakage current. Many efforts have been made to reduce power dissipation by introducing new circuit designs and new device architectures, which is the main scope of this thesis, such as the Silicon-On-Insulator (SOI) and the Selective Buried Oxide (SELBOX) structures. The bulk Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) structure has relatively high power dissipation, in addition to its poor frequency response due to its internal capacitances. As a result, SOI MOSFET has been introduced as an alternative to the bulk MOSFET to minimize power dissipation as well as to tackle the existing problems of the bulk MOSFET. The SOI MOSFET transistor active region is isolated from the substrate and hence device parasitic capacitances are reduced resulting in a faster operation and lower leakage power dissipation. Unfortunately, results showed that the fully-depleted SOI (FD-SOI) and partially-depleted SOI (PD-SOI) suffer from self-heating effect and the PD-SOI has the kink effect problem. Therefore, the concerns towards fabricating a new device that combines the advantages of the bulk and SOI MOSFETs and eliminating their drawbacks have been raised again. The proposed device is called the SELBOX MOSFET and has structural features identical to SOI MOSFET structure with the only difference which is the gap in the isolation layer. Our results showed that the existing gap in the BOX layer has eliminated the self-heating and the kink effects which are the major drawbacks of the SOI MOSFET. The main objective of this thesis is to investigate the dynamic power dissipation of the CMOS SELBOX structure and compare it with that of the CMOS bulk and SOI structures. The devices' fabrication simulation have been conducted using Silvaco TCAD tools. The simulation results show that the dynamic power dissipation of the CMOS bulk, SOI and SELBOX are almost the same at high frequencies. However, at low frequencies, the dynamic power dissipation of the CMOS bulk is the highest and that of CMOS SOI and SELBOX is very close.